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triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 1 april 11, 2006 9.9-12.5gb/s optical modulator dr iver TGA4953-SCC-SL oc-192 metro and long haul applications surface mount package key features and performance ? metro msa compatible ? wide drive range (3v to 10v) ? single-ended input / output ? low power dissipation (1.2w at vo = 6v) ? very low rail ripple ? 25ps edge rates (20/80) ? small form factor - 11.4 x 8.9 x 2 mm - 0.450 x 0.350 x 0.080 inches ? evaluation board available. primary applications ? mach-zehnder modula tor driver for metro and long haul ? irz & duobinary applications description the triquint TGA4953-SCC-SL is part of a series of surface mount modulator drivers suitable for a variety of driver applications and is compatible with metro msa standards. the 4953 consists of two high performance wideband amplifiers combined with off chip circuitry assembled in a surface mount package. a single 4953 placed between the mux and optical modulator provides oems with a board level modulator driver surface mount solution. the 4953 provides metro and long haul designers with system critical features such as: low power dissipation (1.1w at vo = 6v), very low rail ripple, high voltage drive capability at 5v bias (6 v amplitude adjustable to 3 v), low output jitter (1ps rms typical), and low input drive sensitivity (250mv at vo = 6v). the 4953 requires external dc blocks, a low frequency choke, and control circuitry. the TGA4953-SCC-SL is available on an evaluation board. rohs compliant version available. tga4953 evaluation board (metro msa conditions) 10.7 gb/s, v d = 5 v, i d = 210 ma, (pdc = 1.1w) v out = 6 v pp , cpc = 50%, v in = 500 mv pp scale: 2 v/div, 15 ps/div measured performance
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 2 april 11, 2006 TGA4953-SCC-SL table i maximum ratings symbol parameter value notes v d1 v d2t drain voltage 8 v 1 / 2 / v g1 v g2 gate voltage range -3v to 0v 1 / v ctrl1 v ctrl2 control voltage range -3v to v d 1 / i d1 i d2t drain supply current (quiescent) 200 ma 350 ma 1 / 2 / | i g1 | | i g2 | gate supply current 15 ma 1 / | i ctrl1 | | i ctrl2 | control supply current 15 ma 1 / 5 / p in input continuous wave power 23 dbm 1 / 2 / v in 12.5gb/s prbs input voltage 4 v pp 1 / 2 / p d power dissipation 4 w 1 / 2 / 3 / t ch operating channel temperature 150 0 c 4 / t m mounting temperature (10 seconds) 230 0 c t stg storage temperature -65 to 150 0 c 1 / these ratings represent the maximum operable values for this device 2 / combinations of supply voltage, supply current, input power, and output power shall not exceed p d at a package base temperature of 80 c 3 / when operated at this bias condition with a baseplate temperature of 80 c, the mttf is reduced 4 / junction operating temperature will directly affect the device median time to failure (mttf). for maximum life, it is recommended that junction temperatures be maintained at the lowest possible levels. 5 / assure v ctrl1 never exceeds v d1 , and v ctrl2 never exceeds v d2 during bias up and down sequences.
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 3 april 11, 2006 table ii thermal information parameter test conditions t ch ( c) r jc ( c/w) mttf (hrs) r jc thermal resistance (channel to backside of package) v d2t = 4.7v i d2t = 150ma p diss = 0.71w t base = 80 c 98 26 >1e6 note: thermal transfer is conducted thro ugh the bottom of the TGA4953-SCC-SL package into the mother board. the motherboard must be designed to assure adequate thermal tran sfer to the base plate. TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 4 april 11, 2006 TGA4953-SCC-SL table iii rf characterization table (t a = 25 c, nominal) parameter test conditions min typ max units notes small signal bandwidth 8ghz saturated power bandwidth 12 ghz small signal gain 0.1, 2, 4 ghz 6 ghz 10 ghz 14 ghz 16 ghz 30 28 26 19 14 db 1/ 2 / input return loss 0.1, 2, 4, 6, 10, 14, 16 ghz 10 15 db 1/ 2 / output return loss 0.1, 2, 4, 6, 10, 14, 16 ghz 10 15 db 1/ 2 / noise figure 3 ghz 2.5 db small signal agc range midband 30 db saturated output power 2, 4, 6, 8 & 10 ghz 25 dbm 6/ 7 /
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 5 april 11, 2006 table iii notes: 1 / verified at package level rf test 2 / package rf test bias: v d = 5v, adjust v g1 to achieve i d = 65ma then adjust v g2 to achieve i d = 200ma, v ctrl1 = -0.2v & v ctrl2 = +0.2 v 3 / verified by design, smt assembled onto a demonstration board detailed on sheet 6. 4 /v in = 250mv, data rate = 10.7gb/s, v d1 = v d2t or greater, v ctrl2 and v g2 are adjusted for maximum output 5 / computed using rss method where j rms_dut = (j rms_total 2 -j rms_source 2 ) 6 / verified at die level on-wafer probe 7 / power bias die probe: v tee = 8v, adjust v g to achieve i d = 175ma 5%, v ctrl = +1.5v 8 / value is the difference with the 500mv input measurement. result is the absolute value. note: at the die level, drain bias is applied through the rf output port using a bias tee, voltage is at the dc input to the bias tee TGA4953-SCC-SL table iii rf characterization table (t a = 25 c, nominal) parameter test conditions min typ max units notes eye amplitude v d2t = 8.0v v d2t = 6.5v v d2t = 5.5v v d2t = 4.5v v d2t = 4.0v 10 8.0 7.0 6.0 5.5 v pp 3/ 4 / additive jitter (rms) v in = 500mv pp v in = 800mv pp 0.9 1.0 2.0 2.0 ps 5/ q-factor v in = 250mv pp v in = 500mv pp v in = 800mv pp 26.5 28.5 28.5 32 35 35 v/v delta crossing percentage 250mv pp 800mv pp 6.0 6.0 % delta eye amplitude 250mv pp 800mv pp 0.45 0.10 v pp
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 6 april 11, 2006 demonstration board note: devices designated as epu are typically early in their characterization process prior to finalizing all electrical and pr ocess specifications. specifications are subject to change without notice. tga4953 driver package dc block mother board dc block rfout rfin TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 7 april 11, 2006 demonstration board application circuit notes: 1. c3 and c4 extend low frequency performance thru 30 khz. for applications requiring low frequency performance thru 100 khz, c3 and c4 may be omitted 2. c5 is a power supply decoupling capacitor and may be omitted 3. c6 and c7 are power supply decoupling capacitors and may be omitted when driven directly with an op-amp. impedance looking into vctrl1 and vctrl2 is 10k ? real vctrl1 l1 l2 TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 8 april 11, 2006 designator description manufacturer part number c1, c2 dc block, broadband presidio bb0502x7r104m16vnt9820 c3, c4, c5 10uf capacitor mlc ceramic avx 0805yc106ka c6, c7 0.01 ufcapacitor mlc ceramic avx 0603yc103ka c8 10 uf capacitor tantalum avx tajt106k016 l1 220 uh inductor belfuse s581-4000-14 l2 330 nh inductor panasonic eljfa331m r1, r2 274 ? resistor panasonic erj2rkd274 recommended components: demonstration board application circuit (continued) TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 9 april 11, 2006 tga4953 typical performance data measured on a demonstration board demonstration board block diagram TGA4953-SCC-SL vdd idd vg1 vctrl2 vg2 rf(in) rf(out) 4953 smt driver demo-board vctrl1 id1 id2t
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 10 april 11, 2006 typical measured performanc e on demonstration board 10.7gb/s 2^31-1, vdd=5v cpc=50% vo=6v vo=5v vo=4v vo=3v input signal vin=500mv TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 11 april 11, 2006 typical measured performanc e on demonstration board irz 2^31-1, vdd=8v vin=800mvpp TGA4953-SCC-SL 9.953gbps 10.7gbps 11.3gbps input signal 10.7gbps
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 12 april 11, 2006 typical measured performanc e on demonstration board duobinary 2^31-1, vdd=10.5v vin=800mvpp TGA4953-SCC-SL 10.7gbps 11.2gbps 12.5gbps input signal 10.7gbps
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 13 april 11, 2006 typical bias conditions vdd=5v notes: 1. vdd=5v, id1=65ma, and vctrl1=-0.2v 2. vin=500mvpp 3. 50%cpc 4. actual bias points may be different. vo(v) 6 5 4 3 vg1(v) -0.66 -0.66 -0.66 -0.66 vg2(v) -0.57 -0.59 -0.67 -0.74 id 221 198 172 147 vctrl2 +0.22 +0.04 -0.14 -0.34 TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 14 april 11, 2006 bias on 1. disable the output of the ppg 2. set vd=0v vctrl1=0v vctrl2=0 vg1=0v and vg2=0v 3. set vg1=-1.5v vg2=-1.5v vctrl1=-0.2v 4. increase vd to 5v observing id. -assure id=0ma 5. set vctrl2=+0.2v - id should still be 0ma 6. make vg1 more positive until idd=65ma . - this is id1 (current into the first stage) - typical value for vg1 is -0.65v 7. make vg2 more positive until idd=220ma. - this sets id2t to 155ma. - typical value for vg2 is -0.55v 8. enable the output of the ppg. - set vin=500mv 9. output swing adjust : adjust vctrl2 slightly positive to increase output swing or adjust vctrl slightly negative to decrease the output swing. - typical value for vctrl2 is +0.22v for vo=6v. 10. crossover adjust : adjust vg2 slightly positive to push the crossover down or adjust vg2 slightly negative to push the crossover up. - typical value for vg2 is -0.57v to center crossover with vo=6v. bias off 1. disable the output of the ppg 2. set vctrl2=0v 3. set vd=0v 4. set vctrl1=0v 5. set vg2=0v 6. set vg1=0v demonstration board - bias on/off procedure vdd=5v, vo=6vamp, cpc=50% (hot pluggable) TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 15 april 11, 2006 bias on 1. disable the output of mux 2. apply vg1, vg2, vctrl1, vctrl2, and vd in any sequence. note: if vd is applied first id could reach near 400ma. 3. make vg1 more positive until idd=65ma . - this is id1 (current into the first stage) - typical value for vg1 is -0.65v 4. make vg2 more positive until idd=220ma. - this sets id2t to 155ma. - typical value for vg2 is -0.55v 5. enable the output of the mux. - set vin=500mv 6. output swing adjust : adjust vctrl2 slightly positive to increase output swing or adjust vctrl2 slightly negative to decrease the output swing. - typical value for vctrl2 is +0.22v for vo=6v. 7. crossover adjust : adjust vg2 slightly positive to push the crossover down or adjust vg2 slightly negative to push the crossover up. - typical value for vg2 is -0.57v to center crossover with vo=6v. bias off remove vg1, vg2, vctrl1, vctrl2, and vd in any sequence. production - initial alignment - bias procedure vdd=5v, vo=6vamp, cpc=50% (hot pluggable) bias network initial conditions - vg1=-1.5v vg2=-1.5v vctrl1=-0.2v vctrl2=+.1v vd=5v TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 16 april 11, 2006 bias on 1. mux output can be either enabled or disabled 2. apply vg1, vg2, vctrl1, vctrl2, and vd in any sequence. note: if vd is applied first id could reach near 400ma. 3. enable the output of the mux 4. output swing adjust : adjust vctrl2 slightly positive to increase output swing or adjust vctrl slightly negative to decrease the output swing. 5. crossover adjust : adjust vg2 slightly positive to push the crossover down or adjust vg2 slightly negative to push the crossover up. bias off remove vg1, vg2, vctrl1, vctrl2, and vd in any sequence. production - post alignment - bias procedure vdd=5v, vo=6vamp, cpc=50% (hot pluggable) bias network initial conditions - vg1= as found during initial alignment vg2=-as found during initial alignment vctrl1=-0.2v vctrl2=as found during initial alignment vd=5v TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 17 april 11, 2006 bias on 1. disable the output of mux 2. apply vg1, vg2, vctrl1, vctrl2, and vd in any sequence. note: if vd is applied first id could reach near 400ma. 3. make vg1 more positive until idd=80ma . - this is id1 (current into the first stage) - typical value for vg1 is -0.55v 4. enable the output of the mux. - set vin=800mv 5. crossover adjust : adjust vg2 slightly negative to push the crossover towards zero level. 6. output swing adjust : adjust vctrl2 slightly positive to increase output swing or adjust vctrl2 slightly negative to decrease the output swing. 7. duty cycle fine tune : adjust vctrl1 slightly negative to reduce duty cycle percentage. 8. readjust vctrl2 for proper output amplitude. bias off remove vg1, vg2, vctrl1, vctrl2, and vd in any sequence. production - initial alignment ? irz bias procedure vdd=8v, vo=6vamp (hot pluggable) bias network initial conditions - vg1=-1.5v vg2=-2.0v vctrl1=+1.0v vctrl2=+2.0v vd=8v TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 18 april 11, 2006 tga4953 mechanical drawing notes: 1. dimensions: inches. tolerance: length and width: +/-.003 inches. height +/-.006 inches. adjacent pad to pad spacing: +/- .0002 inches. pad size: +/- .001 inches. 2. surface mount interface: material: ro4003 (thickness=.008 inches), 1/2oz copper (thickness=.0007 inches) plating finish: 100-350 microinches nickel underplate, with 5-10 microinches flash gold overplate. TGA4953-SCC-SL
triquint semiconductor texas : (972)994-8465 fax (972)994-8504 web: www.triquint.com product datasheet 19 april 11, 2006 recommended surface mount package assembly proper esd precautions must be followed while handling packages. clean the board with acetone. rinse with alcohol. allow the circuit to fully dry. triquint recommends using a conductive solder paste for attachment. follow solder paste and reflow oven vendors? recommendations when developing a solder reflow profile. typical solder reflow profiles are listed in the table below. hand soldering is not recommended. solder paste can be applied using a stencil printer or dot placement. the volume of solder paste depends on pcb and component layout and should be well controlled to ensure consistent mechanical and electrical performance. this package has little tendency to self-align during reflow . clean the assembly with alcohol. gaas mmic devices are susceptible to damage from electrostatic discharge. pr oper precautions should be observed during handling, assembly and test. typical solder reflow profiles reflow profile snpb pb free ramp-up rate 3 c/sec 3 c/sec activation time and temperature 60 ? 120 sec @ 140 ? 160 c 60 ? 180 sec @ 150 ? 200 c time above melting point 60 ? 150 sec 60 ? 150 sec max peak temperature 240 c 260 c time within 5 c of peak temperature 10 ? 20 sec 10 ? 20 sec ramp-down rate 4 ? 6 c/sec 4 ? 6 c/sec ordering information part package style TGA4953-SCC-SL land grid array surface mount tga4953-sl,rohs land grid array su rface mount (rohs compliant) TGA4953-SCC-SL

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